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集成電路綜合自動(dòng)測試系統硬件平臺設計
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北京航天測控技術(shù)有限公司

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TJ01

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Hardware Platform Design of Integrated Circuit Automatic Test System
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    摘要:

    針對當前國內集成電路產(chǎn)業(yè)快速發(fā)展的現狀,通過(guò)分析集成電路測試需求,研制了國產(chǎn)超大規模集成電路綜合自動(dòng)測試系統硬件平臺。首先設計了基于PXIe總線(xiàn)的硬件平臺總體架構方案,其次研制了包含數字測試模塊等高性能PXIe測試儀器,進(jìn)一步構建了測試頭等分系統并完成系統集成。采用高性能外部?jì)x器和自檢校準分系統,對硬件平臺進(jìn)行了指標測試。基于BM3110MPB開(kāi)展了測試驗證。驗證結果表明,硬件平臺數字測試單通道最高測試速率為1600Mbps、DPS可實(shí)現最大輸出電壓12V、最大輸出電流800mA,具備連接性測試、功能測試、直流參數與交流參數測試等功能。該硬件平臺未來(lái)可有效滿(mǎn)足國產(chǎn)超大規模集成電路測試需要。

    Abstract:

    In view of the rapid development of the domestic IC industry, the hardware platform of the integrated automatic test system for VLSI was developed based on analyzing the requirements of IC testing. Firstly, the overall architecture scheme of the hardware platform based on PXIe bus was designed. Secondly, high-performance PXIe test instruments including digital test modules were developed, and the testing sub-system was further constructed and system integration was completed. A high-performance external instrument and a self-checking and calibration subsystem were used to test the hardware platform, and the test and verification were carried out based on BM3110MPB. The test verification results show that the hardware platform digital test single channel maximum test rate is 1600Mbps, DPS can achieve the maximum output voltage of 12V, the maximum output current of 800mA, with connectivity test, functional test, DC parameters and AC parameters test and other functions. The hardware platform can effectively meet the needs of domestic VLSI testing in the future.

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馮建呈,王占選,閆麗琴,殷曄,尉曉惠,王紅宇,吳朝華.集成電路綜合自動(dòng)測試系統硬件平臺設計計算機測量與控制[J].,2023,31(7):77-84.

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歷史
  • 收稿日期:2022-04-21
  • 最后修改日期:2023-02-14
  • 錄用日期:2023-02-14
  • 在線(xiàn)發(fā)布日期: 2023-07-12
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