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FPGA互連測試中的反饋橋接故障覆蓋問(wèn)題
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南京航空航天大學(xué)電子信息工程學(xué)院

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TP331.2; TN47

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國家自然科學(xué)(No.S61701228 andS61106029S),模擬集成電路重點(diǎn)實(shí)驗室(No.61428020304),航空科學(xué)基金(No.S20180852005)。


The coverage problem of Feedback-bridging fault in the FPGA interconnection test
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    摘要:

    現場(chǎng)可編程門(mén)陣列(FPGA)內部資源眾多,其中互連資源出現故障的概率遠遠高于片內其他資源,而在以往許多互連測試研究中,所生成的測試配置存在無(wú)法覆蓋反饋橋接故障的難題,所以較難有測試配置實(shí)現故障列表的100%覆蓋。因此通過(guò)約束橋接故障只發(fā)生在單個(gè)查找表(LUT)內的信號線(xiàn)上,并結合單項函數,對反饋橋接故障模型進(jìn)行優(yōu)化改進(jìn),從根本上解決難題;然后對優(yōu)化后的反饋橋接故障設置相應的約束條件,再使用布爾可滿(mǎn)足性理論(SAT)生成滿(mǎn)足約束條件的測試配置。采用優(yōu)化后的故障模型對ISCAS"89基準電路進(jìn)行了測試配置生成實(shí)驗,結果表明生成的測試向量解決了反饋橋接故障的覆蓋難題,并且在實(shí)現故障列表的100%覆蓋下,優(yōu)化后的故障模型所需要的測試配置數最少。

    Abstract:

    There are many internal resources in Field Program Gate Array (FPGA), among which the failure probability of interconnect resources is much higher than that of other on-chip resources. However, in many researches on interconnect testing, the generated test configurations are hardly able to cover the feedback-bridging faults, so it was rare to achieve 100% coverage of interconnection fault list. Therefore, the feedback bridge fault model is optimized by constraining the bridge faults within a single look-up table (LUT) and using single-term functions, so as to fundamentally solve the problem. Then, the corresponding constraints are set for the optimized feedback bridge faults, and the test configurations meeting the constraints are generated using the Boolean Satisfiability theory (SAT). Finally, the test configuration generation experiment of the ISCAS"89 benchmark circuit is carried out, and the experimental results show that the generated test vectors not only solve the coverage problem of feedback-bridging faults, but also achieve 100% coverage of the fault list with the minimum configuration times.

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毛志明,張穎,姚嘉祺,華屹峰,楊濟中,陳鑫. FPGA互連測試中的反饋橋接故障覆蓋問(wèn)題計算機測量與控制[J].,2022,30(4):23-28.

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歷史
  • 收稿日期:2021-09-06
  • 最后修改日期:2021-10-15
  • 錄用日期:2021-10-17
  • 在線(xiàn)發(fā)布日期: 2022-04-21
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