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Aiming at the problem of the limited buffer capacity of the wavelet video bit rate control method and the large control accuracy error, a method of video image bit rate control based on the CPLD chip is proposed. According to the CPLD chip-based video image bit rate control block diagram, it can be known that the code rate control method is composed of CPLD chip video image gray level enhancement, encoding bit rate control, video quality control, and active frame skip control. Use Philips 9-bit video input processor sAA7113 chip to decode video and output digital video signals in YUV 4: 2: 2 format up to ITU656 standard. Unify the video signal format, use the linear transformation of gray to enhance the gray of the image, and describe the CPLD execution algorithm with the help of Verilog HDL. According to the relationship between the fixed encoding bit rate and the fixed image quality, the encoding characteristics are obtained, and the target bit number of the buffer and the encoding frame is calculated. According to the current rendering to the texture value, the message loss rate is counted, thereby implementing the video image encoding bit rate control . In order to expand the buffer capacity, the video quality and active frame skip are controlled so that the reduction of the buffer fullness will not cause the controller to accurately adjust the quantization parameters of subsequent frames. The experimental results show that the minimum control error of this method is 0.07, which can effectively improve the video quality.