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Absrtact- The time-frequency characteristics of LFM signal were analyzed, and the principle of signal generation based on direct digital frequency synthesizer (DDS) technology was analyzed. On this basis, EP2C70F896C6 FPGA chip of Cyclone II series of ALTERA company was selected, and the PLL phase-locked loop IP core provided by QUARTUSII system was adopted with ROM lookup table technology. The system clock was designed and the LFM signal with bandwidth B=10MHz and time-width was generated. RTL simulation was carried out by calling Modelsim simulation tool. The simulation results of the circuit of the FPGA are consistent with those of the simulation results of the MATLAB.