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Aiming at the problem of high speed data cache in logging tool, proposes a design method of IP core of SRAM controller based on Nios II, introduces the design and implementation process of IP core in detail, and tests the stability of IP core of SRAM controller based on certain hardware platform. The test results show that the designed SRAM controller IP core can effectively manage SRAM in high temperature environment and can be applied to SRAM with different bit widths and capacities by modifying configuration parameters and running stably. The design not only realizes the management of high speed data cache in logging tool, but also introduces a set of SRAM selection test system. In addition, the development process of SOPC system introduced in the design has certain reference value for the development of other SOPC systems.