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Solid-state Memory based on NAND Flash has been widely applied in aerospace engineering.Limited by its microelectronic characteristic and manufacturing technics, Solid-state Memory may generate invalid blocks duiring the manufacturing or working process.Usually, FPGA is used to manage and tag invalid blocks of Solid-state Memory .To guarantee the correctness and robustness of invalid blocks management provided by FPGA,strict verification must be performed. Simulation System for Solid-state Memory Invalid Blocks Based on VCS was proposed.It provides necessary peripheral IOs for FPGA,especially the feedback mechanism of invalid blocks which making the generation of invalid blocks under control; reading-writing process and the information of invalid blocks are fed back to FPGA in real time; the establishment and maintenance procedure of invalid blocks as well as the response of Solid-state Memory