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According to the communication security problem, proposes a top-down design method of Top-Down FPGA RC4, hardware encryption method based on the realization of data encryption communication, this paper introduces the principle and design process of the RC4 encryption algorithm, using Verilog HDL programming language, using finite state machine(FSM) programming algorithm is simulated by Modelsim SE 10.1a the simulation software, and verified in the FPGA version of the development. The encryption algorithm FPGA encryption software design compared to the rate increased significantly, compared to other hardware encryption clock was significantly reduced.