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LVDS interface has been widely used in high speed data system. In order to realize the intelligent recognition, automatic handshake and the communication test of LVDS high speed data link, FPGA IO circuit is used to design a kind of IIC bus protocol. The IIC bus is used for information transmission between devices; meanwhile, taking advantage of FPGA internal register resources to design PRBS circuit which is used to detect the bit error rate of LVDS interface chip. The experiment shows that the multi - channel LVDS transmission can achieve data stability, low error rate transmission in two meters cable connection, the data transmission rate can reach up to 4.68Gb/s when the clock is 100 MHz.