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To fulfill the needs for the tiny delay of FPGA input/output signals, a FPGA based signal tiny delay method is provided depends on the analysis of FPGA I/O features and I/O logic sources. The IODELAY element is used to achieve the absolute delay of the input and output signals, and the minimal delay pace is 78 ps. Parameters are used to change delay modes. Fixed delay mode and variable delay mode are available for input signals. As for output signals, only fixed delay mode is valid. The application shows that the delay method provided in this paper is of high accuracy and stability, and hardly affected by circumstance such as temperature. 