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The new generation Launch vehicle has the features of high-speed and high-density like any other digital circuit. Multi-channel, high-precision timing sequence and timing bunchs are required to meet the new generation launch vehicle ground test equipment demands of test and calibration, so the problem of signal intergrity can not be ignored during its designing. Parameters of PCB circuit can be obtained to restrain and solve the problem of signal intergrity by modeling and analysing the typical models (USB 3.0 Super-speed Differential pairs, routing of digital and clock of the FPGA peripherals). Design system with these parameters can optimize the quality of signals on the PCB board. Reliability, work continuity and outputing precision of the system can be enhanced, it also improve the test efficiency and test reliability of the new generation launch vehicle. 